Location: Kosice and Bratislava/ Slovakia and Germany/Bavaria
Responsibilities
* Full-custom physical mask design of analog circuit blocks incl. parametric-cell (pCell) design, and/or place-and-route (P&R) of digital HDL-based logic circuits
* Provision of full custom layout tool functionality, including schematic-driven layout connectivity (based on Cadence tool Virtuoso Layout Suite L & XL or Mentor/Tanner or Synopsys)
* Provision of an automated routing solution for full custom and mixed-signal designs (based on Cadence CSR or Synopsys tools)
* Understanding of semiconductor element’s matching properties of parasitic R/L/C elements, and debugging capability to localize the signal disturbance coupling in existing mask layout design.
* Layout verification: design rule check (DRC), electric rule check (ERC), parasitic extraction (RCX) layout vs. Schematic (LVS) using state-of-the-art CAD tools (Cadence Assura/RCX, Mentor Calibre/Galaxy, Synopsys IC compiler)
* Understanding of a chip foundry PDK (process development kit) and its design rules
* Interface to CAD vendors, technology and modeling group, support of internal and external customers, and reviews
* Quality assurance: component test, test within schematic-to-layout-flow; participation in complete flow quality assurance
* Management of chip TapeOut process (GDSII stream out)
Qualifications (professionals or graduates)
* University: Master’s degree in Electrical Engineering or technical college education background
* Knowledge of RF/mixed-signal design process peculiarities and CMOS/FinFET semiconductor technologies
* CAD skills required (Cadence, Mentor Graphics/Tanner or Synopsys design environment: physical layout design using Virtuoso or Galaxy, automated P&R using Cadence Space-Based Router or Synopsys IC compiler or Mentor Galaxy, and layout verification in Assura/RCX, Calibre)
* Experience in physical mask design and/or design automation for analog/mixed-signal ICs
* Unix/Linux skills required
* Experience with internet-based home office work (TeamViewer or WebEx meetings)
* Experience in programming (Perl, TCL, Shell Scripting, C, C++ skills) would be a benefit
* Analytic work methodology and problem analysis
Apply here:
Send us your CV to richar…d.izak@continiumtech.com