Continium Technologies is a fabless semiconductor company, which is offering electronic design services for different kind of Integrated Circuit (IC) products (ASIC application specific integrated circuits, ASSP application specific standard products). Continium’s engineering team posses overall 150 men years of electronic circuit experience with world leading expertise in data converters (ADC analog-to-digital converters / DAC digital-to-analog converters), especially of broad band CTSD ADC (continuous-time Sigma-Delta converters). Members of Continium’s team participated in the design of the ever first commercially available CTSD converter, the ADC12EU050, as well as some smartphone products XMM71. Having long-time experience in Silicon proven CTSD ADC products gives us a very strong competitive advantage and reduces the development risk significantly. Continium’s world-class innovative chip-design differentiates us from giant companies whose strategy, to scale their existing IC products down (e.g 14nm – 7nm FinFET), makes it difficult for them to create innovation in this field and thus significantly reduce power consumption. Our team members, who have been cooperating for years, demonstrate market proven experience which is about to be used for another world-leading high-performance IC solution.
Continium’s Design competences and service offer:
We support you during the semiconductor process technology selection suitable for your product development:
- SiGe or CMOS: high frequency specific foundry vs. general purpose nano-meter scale CMOS or FinFET: evaluating your speed requirements (analog bandwidth, digital interface data rate) we can conclude for optimal nano-meter technology
- SOI for high temperature, high voltage (200V) or RF design
- GaN-on-CMOS for high voltage (650V) and high current (10A) design with highest efficiency.
We support your ASIC product supply chain:
- Selecting proper ASIC package (ceramic, flip-chip, chip-on-board) and packaging partner
- Order wafer lots at your semiconductor foundry
- Continium’s test engineers implement the test program for your IC product on the Verigy V9300 ATE test equipment
The Continium’s founders have, in contrast to many other development teams in the world, not only spent notable amount of efforts and time in thorough research work on the topic. Their know-how and in-house expertise gives Continium Technologiesvery strong competitive advantage in notable reductions of development risks. This is recognized as the core value of the company, including the expertise in the fields:
Analog and mixed-signal circuit design:
- fully differential Operational Amplifier based on different topologies: folded-cascode Amp, multi-path Amp, telescopic Amp
- Comparators
- Reference voltages
- Analog continuous-time RC-filter (active RC Filter, Gm-C-Filter)
- Current-Mode Circuits (filter, pre-Amplifiers)
- Switched Capacitor circuit for data converters, image sensor readout and filtering (correlated double sampling, Amp finite gain and offset compensation, mismatch cancellation techniques)
- power management: SMPS (switched mode power supplies: DC/DC converter) and LDO regulators
- trouble-shooting your non-functional IC design and improving toward serial production maturity
Digital and Logic Circuit design
- SPI/I2C-Interface for data converters (ADC, DAC) and their parameter programming
- Digital Post-processing for ADC and DAC (e.g. Parallel-Serial Conversion, Register storage)
- Digital Calibration of ADC non-linearity (1.5bit/stage conversion with digital background calibration, time-interleaved ADC inter-channel offset and gain calibration)
- Digital Filter: IIR (Infinite Impulse Response), FIR (Finite Impulse Response), Wave-Digital Filters for Sigma-Delta decimation post-filtering and intepolation pre-filtering
- Digital Randomizer/Scrambler for mismatch shaping of DAC converters: DWA (Data Weighted Averaging), DEM (Dynamic Element Matching) algorithms
- Switched-Capacitor ADC clock generator (single SC stage non-overlapping clock generation, multi-stage pipeline clock generation, time-interleaved ADC clock generation)
- Current steering DAC driving clock for P/N current cells, based on low-crossing and high-crossing latches
In average Continium design team has more than 20 years of design experience with different CMOS and BiCMOS technologies all the way down to 28nm technology node.
Design Data base conversion and post-processing like Netlist converter/translator
- EDIF and Open Access Formats
- Cadence and Mentor/Tanner Design flow interoperability
- Simulator netlist conversion scripts:
Tanner Tspice => Synopsys HSPICE
LTspice => Synopsys HSPICE
Netlist converter implemented as AWK script, already implemented and tested,covering the following topics: IF expression, parameter annotations, PWL source annotations, .FUNC functions converted to E/G source elements.
Ask us for more details & support: